High gain stacked cascade amplifiers are used to obtain very high gain for amplifying radio frequency signals by stacking and cascading MOSFET or GaAs FET/pHEMT transistors with a single voltage source and a common current that is supplied to both transistors. While the high gain stacked cascade amplifier achieves very high gain, its main drawback is the reduced output power available because each of the transistors are utilizing the same current, and each transistor can affect the gain and linearity of the other transistor.
FIG. 1 depicts a conventional high gain stacked cascade amplifier 100. In the circuit depicted in FIG. 1, the output of the first amplifying element, Q1, is coupled via a coupling capacitor, Cc, to the second amplifying element, Q2. The source of the second amplifying element, Q2, is grounded by a bypass capacitor, Cbyp. The output node, RFout, of the second amplifying element, Q2, is coupled to the second amplifying element, Q2, at its drain, and the second amplifying element, Q2, has a load resistor, RL. This circuit could be extended by having more stacked amplifying elements above the second amplifying element, Q2, to enable even higher gains to be achieved. Alternatively, an inductor or a constant-current source can be used as a load element for the second amplifying element, Q2.
Since the same current, Idd, flows through both amplifying elements, Q1 and Q2, the current is the same as a single stage amplifier even though two gain stages are used as in the amplifier. The current mirror bias element, Q3, the resistor, R1, and the resistor, R2, form a current mirror bias circuit to bias the first amplifying element, Q1, and the second amplifying element, Q2.
The main drawback of the conventional circuit shown in FIG. 1 is that the output power available is reduced because of the vertical cascading and stacking of the second amplifying element, Q2, in series with the first amplifying element, Q1. While the illustrated circuit may achieve very high gain, the vertical cascading causes the dynamic range of the first amplifier element, Q1, to be diminished by the output requirements of the second amplifier element, Q2. This occurs because there is a given supply voltage, Vdd, and the second amplifier element, Q2, has a minimum voltage drop requirement across its drain and source, and there is a voltage drop across the first amplifying element, Q1, and load resistor, Ra.
Another disadvantage of the conventional high gain stacked cascade amplifier is that the first amplifying element, Q1, and the second amplifying element, Q2, oppose each other in the dynamic current requirements at large input signals. As the input signal increases, the first amplifying element, Q1, conducts more, reducing the power available to the second amplifying element, Q2, through load resistor, Ra. However, the output of the first amplifying element, Q1, reduces the output of the second amplifying element, Q2, which in turn restricts the supply current to the first amplifying element, Q1. Thus, as the input signal increases, the gain compression of the circuit increases because of the requirements of each of the two amplifiers. As a result, both the linearity and output power are degraded. Gain compression also occurs at a lower input power level compared to an amplifier with a single amplifying element.